Browsing by author "De Vos, Joeri"
Now showing items 21-40 of 105
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Characterization of inorganic dielectric layers for low thermal budget wafer to wafer bonding
Inoue, Fumihiro; Peng, Lan; Phommahaxay, Alain; Kim, Soon-Wook; De Vos, Joeri; Sleeckx, Erik; Miller, Andy; Beyer, Gerald; Beyne, Eric (2017) -
Characterization of optical end-point detection for via reveal processing
Rassoul, Nouredine; Jourdain, Anne; Tutunjyan, Nina; De Vos, Joeri; Sardo, Stefano; Piumi, Daniele; Miller, Andy; Beyne, Eric; Walsby, Edward; Ashraf, Huma; Thomas, Dave (2018) -
Comparative reliability investigation of different nitride based local charge trapping memory devices
Breuil, Laurent; Haspeslagh, Luc; Blomme, Pieter; Lorenzini, Martino; Wellekens, Dirk; De Vos, Joeri; Van Houdt, Jan (2005) -
Comparative study of 3D stacked IC and 3D interposer integration: processing and assembly challenges
De Vos, Joeri; Cherman, Vladimir; Detalle, Mikael; Wang, Teng; Salahouelhadj, Abdellah; Daily, Robert; Van der Plas, Geert; Beyne, Eric (2014) -
Comparison between wet and dry silicon via reveal in 3D backside processing
Thomas, Dave; Hopkins, Janet; Ashraf, Huma; Patel, Jash; Ansell, Oliver; Jourdain, Anne; De Vos, Joeri; Miller, Andy; Beyne, Eric (2015) -
Comparison of micro-electronic test structures for noise measurement verification
Van Den Bosch, Sven; De Ketelaere, Wim; Martens, Luc; De Vos, Joeri (1999) -
Continuity and reliability assessment of a scalable 3×50μm and 2×40μm Via-middle TSV module
Van Huylenbroeck, Stefaan; Li, Yunlong; Stucchi, Michele; Bogaerts, Lieve; De Vos, Joeri; Beyer, Gerald; Beyne, Eric; Brouri, Mohand; Nalla, Praveen; Gopinath, Sanjay; Thorum, Matthew; Richardson, Joe; Yu, Jengyi (2016) -
Die-to-Die and Die-to-Wafer bonding solutions for high density, fine pitch micro-bumped die
Lecarpentier, Gilbert; De Vos, Joeri (2012) -
Dielectric reliability of highly scaled through silicon via for wafer level 3D-SoC applications
Li, Yunlong; Van Huylenbroeck, Stefaan; De Vos, Joeri; Wu, Chen; Stucchi, Michele; Croes, Kristof; Van der Plas, Geert; Beyer, Gerald; Beyne, Eric (2018) -
Effect of Al203 morphology on the erase saturation performance in SANOS-type memory cells
Cacciato, Antonio; Furnemont, Arnaud; Breuil, Laurent; De Vos, Joeri; Haspeslagh, Luc; Van Houdt, Jan (2007) -
Effect of test structure on electromigration characteristics in 3D-TSV stacked devices
Oba, Yoshiyuki; De Messemaeker, Joke; Tyrovouzi, Anna Maria; Miyamori, Yuichi; De Vos, Joeri; Wang, Teng; Beyer, Gerald; Beyne, Eric; De Wolf, Ingrid; Croes, Kristof (2014) -
Effect of test structure on electromigration characteristics in 3D-TSV stacked devices
Oba, Yoshiyuki; De Messemaeker, Joke; Tyrovouzi, Anna-Maria; Miyamori, Yuichi; De Vos, Joeri; Wang, Teng; Beyer, Gerald; Beyne, Eric; De Wolf, Ingrid; Croes, Kristof (2015) -
Effects of packaging on mechanical stress in 3D-ICs
Cherman, Vladimir; Lofrano, Melina; Simons, Veerle; Gonzalez, Mario; Van der Plas, Geert; De Vos, Joeri; Wang, Teng; Daily, Robert; Salahouelhadj, Abdellah; Beyer, Gerald; La Manna, Antonio; De Wolf, Ingrid; Beyne, Eric (2015) -
Enabling pre-sssembly process of 3D wafers with high topography at the backside
Podpod, Arnita; Demeurisse, Caroline; Inoue, Fumihiro; Duval, Fabrice; Visker, Jakob; De Vos, Joeri; Rebibis, Kenneth June; Miller, Andy; Beyer, Gerald; Beyne, Eric (2015) -
Etch process modules development and integration in 3D SOC applications
Tutunjyan, Nina; Sardo, Stefano; De Vos, Joeri; Van Huylenbroeck, Stefaan; Jourdain, Anne; Peng, Lan; Inoue, Fumihiro; Rassoul, Nouredine; Beyer, Gerald; Beyne, Eric; Miller, Andy; Piumi, Daniele; Walsby, Edward; Ansell, Oliver; Ashraf, Huma; Thomas, Dave (2017) -
Etch process modules development and integration in 3D-SOC applications
Tutunjyan, Nina; Sardo, Stefano; De Vos, Joeri; Van Huylenbroeck, Stefaan; Jourdain, Anne; Peng, Lan; Inoue, Fumihiro; Rassoul, Nouredine; Beyer, Gerald; Beyne, Eric; Miller, Andy; Piumi, Daniele (2018) -
Experimental characterization of the vertical and lateral heat transfer in 3D-SIC packages
Oprins, Herman; Cherman, Vladimir; Van der Plas, Geert; De Vos, Joeri; Beyne, Eric (2015-07) -
Experimental characterization of the vertical and lateral heat transfer in 3D stacked IC packages
Oprins, Herman; Cherman, Vladimir; Van der Plas, Geert; De Vos, Joeri; Beyne, Eric (2016-03) -
Experimental thermal characterization and thermal model validation of 3D packages using a programmable thermal test chip
Oprins, Herman; Cherman, Vladimir; Van der Plas, Geert; Maggioni, Federica; De Vos, Joeri; Wang, Teng; Daily, Robert; Beyne, Eric (2015-05) -
Extreme thinning of Si wafers for via-last and multi wafer stacking applications
Jourdain, Anne; De Vos, Joeri; Rassoul, Nouredine; Zahedmanesh, Houman; Miller, Andy; Beyer, Gerald; Beyne, Eric; Walsby, Edward; Patel, Jash; Ansell, Oliver; Ashraf, Huma; Thomas, Dave; Li, Shifang; Chang, Timothy; Hiebert, Stephen; Cross, Andrew; Stoerring, Moritz (2018)