Simulation methodology for analysis of substrate noise impact on analog / RF circuits including interconnect resistance

Soens, CharlotteCharlotteSoensVan der Plas, GeertGeertVan der PlasWambacq, PietPietWambacqDonnay, StephaneStephaneDonnay2021-10-162021-10-162005-03https://imec-publications.be/handle/20.500.12860/11251Simulation methodology for analysis of substrate noise impact on analog / RF circuits including interconnect resistanceProceedings paper