Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7

Gupta, MohitMohitGuptaWeckx, PieterPieterWeckxCosemans, StefanStefanCosemansSchuddinck, PieterPieterSchuddinckBaert, RogierRogierBaertYakimets, DmitryDmitryYakimetsJang, DoyoungDoyoungJangSherazi, YasserYasserSheraziRaghavan, PraveenPraveenRaghavanSpessot, AlessioAlessioSpessotMocuta, AndaAndaMocutaDehaene, WimWimDehaene2021-10-242021-10-242017https://imec-publications.be/handle/20.500.12860/28439Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7Proceedings paperhttp://ieeexplore.ieee.org/document/8066640/