Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect

Pei, ZhenlinZhenlinPeiMayahinia, MahtaMahtaMayahiniaLiu, Hsiao-HsuanHsiao-HsuanLiuTahoori, MehdiMehdiTahooriCatthoor, FranckyFranckyCatthoorTokei, ZsoltZsoltTokeiPan, ChenyunChenyunPan2023-11-302023-08-242023-08-292023-11-302023naWOS:001042307500028https://imec-publications.be/handle/20.500.12860/42394Technology/Memory Co-Design and Co-Optimization Using E-Tree InterconnectProceedings paper10.1145/3583781.3590311979-8-4007-0125-2WOS:001042307500028Technology/Memory Co-DesignE-Tree Interconnect