Incorporating parameter variations in BTI impact on nano-scale logical gate analysis

Khan, SeyabSeyabKhanHamdioui, SaidSaidHamdiouiKukner, HalilHalilKuknerRaghavan, PraveenPraveenRaghavanCatthoor, FranckyFranckyCatthoor2021-10-202021-10-202012https://imec-publications.be/handle/20.500.12860/20930Incorporating parameter variations in BTI impact on nano-scale logical gate analysisProceedings paper