Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails

Veloso, AnabelaAnabelaVelosoJourdain, AnneAnneJourdainRadisic, DunjaDunjaRadisicChen, RongmeiRongmeiChenArutchelvan, GouthamGouthamArutchelvanO'Sullivan, BarryBarryO'SullivanArimura, HiroakiHiroakiArimuraStucchi, MicheleMicheleStucchiDe Keersgieter, AnAnDe KeersgieterHosseini, MaryamMaryamHosseiniHopf, TobyTobyHopfD'have, KoenKoenD'haveWang, ShouhuaShouhuaWangDupuy, EmmanuelEmmanuelDupuyMannaert, GeertGeertMannaertVandersmissen, KevinKevinVandersmissenIacovo, SerenaSerenaIacovoMarien, PhilippePhilippeMarienChoudhury, SubhobrotoSubhobrotoChoudhurySchleicher, FilipFilipSchleicherSebaai, FaridFaridSebaaiOniki, YusukeYusukeOnikiZhou, X.X.ZhouGupta, AnshulAnshulGuptaSchram, TomTomSchramBriggs, BasoeneBasoeneBriggsLorant, ChristopheChristopheLorantRosseel, ErikErikRosseelHikavyy, AndriyAndriyHikavyyLoo, RogerRogerLooGeypen, JefJefGeypenBatuk, DmitryDmitryBatukMartinez Alanis, Gerardo TadeoGerardo TadeoMartinez AlanisSoulie, Jean-PhilippeJean-PhilippeSoulieDevriendt, KatiaKatiaDevriendtChan, BTBTChanDemuynck, StevenStevenDemuynckHiblot, GaspardGaspardHiblotVan der Plas, GeertGeertVan der PlasRyckaert, JulienJulienRyckaertBeyer, GeraldGeraldBeyerDentoni Litta, EugenioEugenioDentoni LittaBeyne, EricEricBeyneHoriguchi, NaotoNaotoHoriguchi2022-12-092022-10-152022-12-0920220018-9383WOS:000862373200001https://imec-publications.be/handle/20.500.12860/40572Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power RailsJournal article10.1109/TED.2022.3205561WOS:000862373200001