Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole

Franco, JacopoJacopoFrancoVais, AbhitoshAbhitoshVaisSioncke, SonjaSonjaSionckePutcha, VamsiVamsiPutchaKaczer, BenBenKaczerShie, Bo-ShiuanBo-ShiuanShieShi, XiaopingXiaopingShiReyhaneh, MahloujiMahloujiReyhanehNyns, LauraLauraNynsZhou, DaisyDaisyZhouWaldron, NiamhNiamhWaldronMaes, JanJanMaesXie, QiQiXieGivens, M.M.GivensTang, F.F.TangJiang, X.X.JiangArimura, HiroakiHiroakiArimuraSchram, TomTomSchramRagnarsson, Lars-AkeLars-AkeRagnarssonSibaja-Hernandez, ArturoArturoSibaja-HernandezHellings, GeertGeertHellingsHoriguchi, NaotoNaotoHoriguchiHeyns, MarcMarcHeynsGroeseneken, GuidoGuidoGroesenekenLinten, DimitriDimitriLintenCollaert, NadineNadineCollaertThean, AaronAaronThean2021-10-232021-10-232016https://imec-publications.be/handle/20.500.12860/26633Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipoleProceedings paperhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=7573371