Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs

Veloso, AnabelaAnabelaVelosoParaschiv, VasileVasileParaschivVecchio, EmmaEmmaVecchioDevriendt, KatiaKatiaDevriendtLi, WaikinWaikinLiSimoen, EddyEddySimoenChan, BTBTChanTao, ZhengZhengTaoRosseel, ErikErikRosseelLoo, RogerRogerLooMilenin, AlexeyAlexeyMileninKunert, BernardetteBernardetteKunertTeugels, LieveLieveTeugelsSebaai, FaridFaridSebaaiLorant, ChristopheChristopheLorantvan Dorp, DennisDennisvan DorpAltamirano Sanchez, EfrainEfrainAltamirano SanchezBrus, StephanStephanBrusMarien, PhilippePhilippeMarienFleischmann, ClaudiaClaudiaFleischmannMelkonyan, DavitDavitMelkonyanHuynh Bao, TrongTrongHuynh BaoEneman, GeertGeertEnemanHellings, GeertGeertHellingsSibaja-Hernandez, ArturoArturoSibaja-HernandezMatagne, PhilippePhilippeMatagneWaldron, NiamhNiamhWaldronMocuta, DanDanMocutaCollaert, NadineNadineCollaert2021-10-242021-10-242017https://imec-publications.be/handle/20.500.12860/29811Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETsProceedings paperhttp://ecst.ecsdl.org/content/80/2/3.abstract