Defect analysis of strained silicon on thin strain-relaxed buffer layers for high mobility Transistors

Eneman, GeertGeertEnemanSimoen, EddyEddySimoenDelhougne, RomainRomainDelhougneGaubas, EugenijusEugenijusGaubasSimons, VeerleVeerleSimonsRoussel, PhilippePhilippeRousselVerheyen, PeterPeterVerheyenLauwers, AnneAnneLauwersLoo, RogerRogerLooVandervorst, WilfriedWilfriedVandervorstDe Meyer, KristinKristinDe MeyerClaeys, CorCorClaeys2021-10-152021-10-152004https://imec-publications.be/handle/20.500.12860/8880Defect analysis of strained silicon on thin strain-relaxed buffer layers for high mobility TransistorsOral presentation