Stress simulations of Si- and Ge-channel FinFETs for the 14 nm-node and beyond

Eneman, GeertGeertEnemanBrunco, DavidDavidBruncoWitters, LiesbethLiesbethWittersVincent, BenjaminBenjaminVincentFavia, PaolaPaolaFaviaHikavyy, AndriyAndriyHikavyyDe Keersgieter, AnAnDe KeersgieterMitard, JeromeJeromeMitardLoo, RogerRogerLooVeloso, AnabelaAnabelaVelosoRichard, OlivierOlivierRichardBender, HugoHugoBenderVandervorst, WilfriedWilfriedVandervorstCaymax, MattyMattyCaymaxHoriguchi, NaotoNaotoHoriguchiCollaert, NadineNadineCollaertThean, AaronAaronThean2021-10-212021-10-212013https://imec-publications.be/handle/20.500.12860/22311Stress simulations of Si- and Ge-channel FinFETs for the 14 nm-node and beyondProceedings paper