Complete degradation mapping of stacked gate-all-around Si nanowire transistors considering both intrinsic and extrinsic effects

Vaisman Chasin, AdrianAdrianVaisman ChasinBury, ErikErikBuryKaczer, BenBenKaczerFranco, JacopoJacopoFrancoRoussel, PhilippePhilippeRousselRitzenthaler, RomainRomainRitzenthalerMertens, HansHansMertensHoriguchi, NaotoNaotoHoriguchiLinten, DimitriDimitriLintenMocuta, AndaAndaMocuta2021-10-242021-10-242017https://imec-publications.be/handle/20.500.12860/29617Complete degradation mapping of stacked gate-all-around Si nanowire transistors considering both intrinsic and extrinsic effectsProceedings paperhttp://ieeexplore.ieee.org/document/8268343/