Shallow junctions for sub-100 nm CMOS technology

Meyssen, VeerleVeerleMeyssenStolk, PeterPeterStolkvan Zijl, JeroenJeroenvan Zijlvan Berkum, JurgenJurgenvan Berkumvan de Wijgert, WillemWillemvan de WijgertLindsay, RichardRichardLindsayDachs, CharlesCharlesDachsMannino, GiovanniGiovanniManninoCowern, NickNickCowern2021-10-142021-10-142001https://imec-publications.be/handle/20.500.12860/5890Shallow junctions for sub-100 nm CMOS technologyProceedings paper