Comparison between drain induced barrier lowering in partially and fully depleted 0.13 μm SOI nMOSFETs in low temperature operation

Pavanello, M.A.M.A.PavanelloMartino, J.A.J.A.MartinoSimoen, EddyEddySimoenClaeys, CorCorClaeys2021-10-152021-10-152004https://imec-publications.be/handle/20.500.12860/9409Comparison between drain induced barrier lowering in partially and fully depleted 0.13 μm SOI nMOSFETs in low temperature operationProceedings paper