COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications

Marinelli, TommasoTommasoMarinelliPerez, Jose Ignacio GomezJose Ignacio GomezPerezTenllado, ChristianChristianTenlladoCatthoor, FranckyFranckyCatthoor2024-03-182024-02-112024-03-1820231383-7621WOS:001110208700001https://imec-publications.be/handle/20.500.12860/43531COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applicationsJournal article10.1016/j.sysarc.2023.103022WOS:001110208700001