Thermal stress-aware CMOS-SRAM partitioning in sequential 3-D technology

Salahuddin, Shairfe MuhammadShairfe MuhammadSalahuddinDentoni Litta, EugenioEugenioDentoni LittaGupta, AnshulAnshulGuptaRitzenthaler, RomainRomainRitzenthalerSchaekers, MarcMarcSchaekersEveraert, Jean-LucJean-LucEveraertYu, HaoHaoYuVandooren, AnneAnneVandoorenRyckaert, JulienJulienRyckaertNa, Myung HeeMyung HeeNaSpessot, AlessioAlessioSpessot2021-10-292021-10-2920200018-9383https://imec-publications.be/handle/20.500.12860/35880Thermal stress-aware CMOS-SRAM partitioning in sequential 3-D technologyJournal articlehttps://ieeexplore.ieee.org/document/9204748/