200 MBit/s 4-symbol arithmetic encoder architecture for embedded zero tree-based compression

Osorio, RobertoRobertoOsorioVanhoof, BartBartVanhoof2021-10-142021-10-142001https://imec-publications.be/handle/20.500.12860/5557200 MBit/s 4-symbol arithmetic encoder architecture for embedded zero tree-based compressionProceedings paper