Single Mask Solution to Pattern BLP and SNLP using 0.33NA EUV for Next Generation DRAM Manufacturing

Sah, KaushikKaushikSahCross, AndrewAndrewCrossDas, SayantanSayantanDasFallica, RobertoRobertoFallicaLee, JeonghoonJeonghoonLeeKim, Ryan Ryoung hanRyan Ryoung hanKimHalder, SandipSandipHalderMaguire, EthanEthanMaguireArmeanu, Ana-MariaAna-MariaArmeanuSears, MonicaMonicaSearsLafferty, NealNealLaffertyLiubich, VladVladLiubichWei, Chih-, IChih-, IWeiFenger, GermainGermainFenger2023-06-082023-03-222023-06-0820220277-786XWOS:000944102600031https://imec-publications.be/handle/20.500.12860/41334Single Mask Solution to Pattern BLP and SNLP using 0.33NA EUV for Next Generation DRAM ManufacturingProceedings paper10.1117/12.2645953978-1-5106-5640-6WOS:000944102600031