Backside Power Delivery With Relaxed Overlay for Backside Patterning Using Extreme Wafer Thinning and Molybdenum-Filled Slit Nano Through Silicon Vias

Zhao, PengPengZhaoWitters, LiesbethLiesbethWittersJourdain, AnneAnneJourdainStucchi, MicheleMicheleStucchiJourdan, NicolasNicolasJourdanMaes, J. W.J. W.MaesBana, H.H.BanaZhu, C.C.ZhuChukka, RamiRamiChukkaSebaai, FaridFaridSebaaiVandersmissen, KevinKevinVandersmissenHeylen, NancyNancyHeylenMontero Alvarez, DanielDanielMontero AlvarezWang, S.S.WangD'havé, KoenKoenD'havéSchleicher, F.F.SchleicherDe Vos, JoeriJoeriDe VosBeyer, GeraldGeraldBeyerMiller, AndyAndyMillerBeyne, EricEricBeyne2025-07-142024-11-282025-07-1420240018-9383WOS:001358209500001https://imec-publications.be/handle/20.500.12860/44852Backside Power Delivery With Relaxed Overlay for Backside Patterning Using Extreme Wafer Thinning and Molybdenum-Filled Slit Nano Through Silicon ViasJournal article10.1109/TED.2024.3487080WOS:001358209500001