Performance and perspectives of 0-level MEMS chip packages with vertical interconnects

Cherman, VladimirVladimirChermanPham, NgaNgaPhamSlabbekoorn, JohnJohnSlabbekoornFaes, AlessandroAlessandroFaesMargesin, BennoBennoMargesinTilmans, HarrieHarrieTilmans2021-10-222021-10-2220141551-4897https://imec-publications.be/handle/20.500.12860/23640Performance and perspectives of 0-level MEMS chip packages with vertical interconnectsJournal articlehttp://www.imaps.org/imapsstore/detail.aspx?ID=4013