Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs

Cretu, BogdanBogdanCretuVeloso, AnabelaAnabelaVelosoSimoen, EddyEddySimoen2023-05-162023-01-012023-05-1620230018-9383WOS:000899998800001https://imec-publications.be/handle/20.500.12860/40929Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETsJournal article10.1109/TED.2022.3225248WOS:000899998800001UNIVERSAL CORE MODELPARAMETER EXTRACTION1/F NOISETECHNOLOGYMOSFETSREGION