Ultra low-EOT (5 Å) gate-first and gate-last high performance CMOS achieved by gate-electrode optimization

Ragnarsson, Lars-AkeLars-AkeRagnarssonLi, ZilanZilanLiTseng, JoshuaJoshuaTsengSchram, TomTomSchramRohr, ErikaErikaRohrCho, Moon JuMoon JuChoKauerauf, ThomasThomasKaueraufConard, ThierryThierryConardOkuno, Y.Y.OkunoParvais, BertrandBertrandParvaisAbsil, PhilippePhilippeAbsilBiesemans, SergeSergeBiesemansHoffmann, Thomas Y.Thomas Y.Hoffmann2021-10-182021-10-182009https://imec-publications.be/handle/20.500.12860/16085Ultra low-EOT (5 Å) gate-first and gate-last high performance CMOS achieved by gate-electrode optimizationProceedings paper