CFET standard-cell design down to 3Track height for node 3nm and below

Sherazi, YasserYasserSheraziChae, Jung KyuJung KyuChaeDebacker, PeterPeterDebackerMattii, LucaLucaMattiiVerkest, DiederikDiederikVerkestMocuta, AndaAndaMocutaKim, Ryan Ryoung hanRyan Ryoung hanKimSpessot, AlessioAlessioSpessotDounde, AmitAmitDoundeRyckaert, JulienJulienRyckaert2021-10-272021-10-272019https://imec-publications.be/handle/20.500.12860/33986CFET standard-cell design down to 3Track height for node 3nm and belowProceedings paperhttps://doi.org/10.1117/12.2514571