Scalable Through Silicon Via with polymer deep trench isolation for 3D wafer level packaging

Sabuncuoglu Tezcan, DenizDenizSabuncuoglu TezcanDuval, FabriceFabriceDuvalPhilipsen, HaroldHaroldPhilipsenLuhn, OleOleLuhnSoussan, PhilippePhilippeSoussanSwinnen, BartBartSwinnen2021-10-182021-10-182009https://imec-publications.be/handle/20.500.12860/16147Scalable Through Silicon Via with polymer deep trench isolation for 3D wafer level packagingProceedings paper