Chen, ZequanZequanChenPomeroy, James W.James W.PomeroyAbdallah, ZeinaZeinaAbdallahNorman, LeoLeoNormanHuang, PengPengHuangSmith, Matthew D.Matthew D.SmithVohra, AnuragAnuragVohraKumar, SujitSujitKumarDecoutere, StefaanStefaanDecoutereBakeroot, BenoitBenoitBakerootKuball, MartinMartinKuball2026-05-042026-05-0420260741-31061558-0563https://imec-publications.be/handle/20.500.12860/59287The thermal characteristics of large area GaN HEMTs on 200 mm QST engineered substrates are compared to those on GaN-on-Si. The thermal conductivity (TC) of the superlattice (SL) epitaxial buffer layers and the buried oxide layer (BOX) on the QST substrates are extracted through Raman thermography combined with 3-D finite element method (FEM) thermal simulations. The thermal resistance of large area transistors on QST is up ~1/3 lower than equivalent transistors on GaN-on-Si substrates. Transient device thermal simulation also demonstrates that QST substrates are advantageous for thermal management during switching operations, despite the buried oxide layer.engJournal article10.1109/led.2026.3666882WOS:0017238171000261558-0563