Scaling induced drain current degradation for low voltage operation of CMOS technology below 100 nm: impact of non-scalable parameters

Henson, KirklenKirklenHensonKubicek, StefanStefanKubicekDe Meyer, KristinKristinDe Meyer2021-10-142021-10-142000https://imec-publications.be/handle/20.500.12860/4424Scaling induced drain current degradation for low voltage operation of CMOS technology below 100 nm: impact of non-scalable parametersProceedings paper