Niu, ShengpuShengpuNiuYin, XinXinYin2026-03-162026-03-162025979-8-3315-0904-01099-4742https://imec-publications.be/handle/20.500.12860/58852To overcome the bandwidth and sampling rate limitations of the CMOS ADCs, a high-speed analog de-multiplexer (ADEMUX) offers scalability for the future heterogeneous ADC and the wireline receivers. We discuss the design considerations of high-speed ADEMUX, including architecture comparison, and circuit design.engProceedings paper10.1109/sum65312.2025.11121811WOS:001583595800065