Simulation of advanced-LOCOS capability for sub-0.25 micron CMOS isolation

Jones, S. K.S. K.JonesBazley, D. J.D. J.BazleyBeanland, R.R.BeanlandBadenes, GonçalGonçalBadenesScaife, B.B.Scaife2021-09-302021-09-301997https://imec-publications.be/handle/20.500.12860/1958Simulation of advanced-LOCOS capability for sub-0.25 micron CMOS isolationProceedings paper