Thermal stability and switching performance metrics of top-pinned STT-MRAM devices with CMOS-compatible dual MgO MTJ stacks

Rao, SiddharthSiddharthRaoKim, WoojinWoojinKimCouet, SebastienSebastienCouetSwerts, JohanJohanSwertsMertens, SofieSofieMertensLin, TsannTsannLinSouriau, LaurentLaurentSouriauKundu, ShreyaShreyaKunduTsvetanova, DianaDianaTsvetanovaCrotti, DavideDavideCrottiYasin, FarrukhFarrukhYasinSakhare, SushilSushilSakhareFurnemont, ArnaudArnaudFurnemontKar, Gouri SankarGouri SankarKar2021-10-242021-10-242017https://imec-publications.be/handle/20.500.12860/29270Thermal stability and switching performance metrics of top-pinned STT-MRAM devices with CMOS-compatible dual MgO MTJ stacksOral presentation