Toward Fine-Grained Partitioning of Low-Level SRAM Caches for Emerging 3D-IC Designs

Das, SudiptaSudiptaDasKumari, BhawanaBhawanaKumariSahoo, Siva SatyendraSiva SatyendraSahooChen, YukaiYukaiChenMyers, JamesJamesMyersMilojevic, DragomirDragomirMilojevicBiswas, DwaipayanDwaipayanBiswasRyckaert, JulienJulienRyckaert2025-06-202024-10-262025-06-2020242329-9231WOS:001335432300001https://imec-publications.be/handle/20.500.12860/44685Toward Fine-Grained Partitioning of Low-Level SRAM Caches for Emerging 3D-IC DesignsJournal article10.1109/JXCDC.2024.3468386WOS:001335432300001PERFORMANCEMEMORY