Rinaudo, PietroPietroRinaudoChasin, AdrianAdrianChasinKaczer, BenBenKaczerZhao, YingYingZhaoDekkers, HaroldHaroldDekkersSubhechha, SubhaliSubhaliSubhechhaBelmonte, AttilioAttilioBelmonteAfanas'ev, ValeriValeriAfanas'evDe Wolf, IngridIngridDe WolfFranco, JacopoJacopoFranco2026-09-162026-09-1620260018-93831557-9646https://imec-publications.be/handle/20.500.12860/60389We apply our finite element-based framework, introduced in Part 1, to understand the effects of channel thickness and doping on the degradation of indium–gallium–zinc oxide (IGZO)-based thin-film transistors (TFTs) with different architectures. By taking into account only experimentally extracted band alignments and amorphous semiconductor-specific physics, it is possible to explain apparent discrepancies in previously reported positive bias temperature instabilities (PBTI) trends. Our analysis shows that common PBTI benchmarks used in standard inversion-mode bulk Si devices cannot be employed in thin-film accumulation-mode IGZO devices. Finally, based on these insights, we propose device optimization strategies to reduce the electron trapping component of PBTI in amorphous IGZO TFTs.engJournal article10.1109/ted.2026.3693665WOS:001779941400001TRANSISTORS1557-9646