STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application

Rao, SiddharthSiddharthRaoKim, WoojinWoojinKimVan Beek, SimonSimonVan BeekKundu, ShreyaShreyaKunduPerumkunnil, ManuManuPerumkunnilCosemans, StefanStefanCosemansYasin, FarrukhFarrukhYasinCouet, SebastienSebastienCouetCarpenter, RobertRobertCarpenterO'Sullivan, BarryBarryO'SullivanHoushmand Sharifi, ShaminShaminHoushmand SharifiJossart, NicoNicoJossartSouriau, LaurentLaurentSouriauGoux, LudovicLudovicGouxCrotti, DavideDavideCrottiKar, Gouri SankarGouri SankarKar2021-11-252021-11-022021-11-2520212330-7978WOS:000681328500021https://imec-publications.be/handle/20.500.12860/37675STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache applicationProceedings paper10.1109/IMW51353.2021.9439592978-1-7281-8517-0WOS:000681328500021