Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits

Syshchyk, OlgaOlgaSyshchykCosnier, ThibaultThibaultCosnierHuang, Zheng-HongZheng-HongHuangCingu, DeepthiDeepthiCinguWellekens, DirkDirkWellekensVohra, AnuragAnuragVohraGeens, KarenKarenGeensVudumula, PavanPavanVudumulaChatterjee, UrmimalaUrmimalaChatterjeeDecoutere, StefaanStefaanDecoutereWu, Tian-LiTian-LiWuBakeroot, BenoitBenoitBakeroot2023-04-282023-02-092023-04-2820221930-8876WOS:000904209900008https://imec-publications.be/handle/20.500.12860/41073Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power CircuitsProceedings paper10.1109/ESSDERC55479.2022.9947150978-1-6654-8497-8WOS:000904209900008