Van Beek, SimonSimonVan BeekVaisman Chasin, AdrianAdrianVaisman ChasinSubhechha, SubhaliSubhaliSubhechhaDekkers, HaroldHaroldDekkersRassoul, NouredineNouredineRassoulWan, YiqunYiqunWanTang, HongweiHongweiTangBastos, JoaoJoaoBastosBelmonte, AttilioAttilioBelmonteKar, Gouri SankarGouri SankarKar2026-03-302026-03-302025979-8-3315-0478-61541-7026https://imec-publications.be/handle/20.500.12860/58965Reliability in IGZO thin-film transistors (TFT) is known to be limited by Bias Temperature Instability (BTI), however there are no detailed studies on other reliability mechanisms, like dielectric breakdown. We study both bottom-gated and top-gated transistors and find different area scaling trends in those devices, which could be partially explained with a non-uniform voltage distribution across the active area during the voltage accelerated breakdown stress. Both bottom and top-gated TFT obtain a maximum tolerable voltage of more than 2 V at 95°C for 10 years. Even for the smallest measured device, 80x25 nm2, breakdown is not a reliability concern.engDielectric breakdown analysis on bottom and top-gated IGZO-TFTProceedings paper10.1109/IRPS48204.2025.10983521WOS:001546466200139