Gate-all-around transistors based on vertically stacked Si nanowires

Mertens, HansHansMertensRitzenthaler, RomainRomainRitzenthalerHikavyy, AndriyAndriyHikavyyKim, Min-SooMin-SooKimTao, ZhengZhengTaoWostyn, KurtKurtWostynSchram, TomTomSchramKunnen, EddyEddyKunnenRagnarsson, Lars-AkeLars-AkeRagnarssonDekkers, HaroldHaroldDekkersHopf, TobyTobyHopfDevriendt, KatiaKatiaDevriendtTsvetanova, DianaDianaTsvetanovaChew, Soon AikSoon AikChewKikuchi, YoshiakiYoshiakiKikuchiVan Besien, ElsElsVan BesienRosseel, ErikErikRosseelMannaert, GeertGeertMannaertDe Keersgieter, AnAnDe KeersgieterVaisman Chasin, AdrianAdrianVaisman ChasinKubicek, StefanStefanKubicekDangol, AnishAnishDangolDemuynck, StevenStevenDemuynckBarla, KathyKathyBarlaMocuta, DanDanMocutaHoriguchi, NaotoNaotoHoriguchi2021-10-242021-10-242017https://imec-publications.be/handle/20.500.12860/28970Gate-all-around transistors based on vertically stacked Si nanowiresProceedings paperhttp://ecst.ecsdl.org/content/77/5/19.abstract