In-line electrical metrology for high-k gate dielectrics deposited by atomic layer CVD

De Witte, HildeHildeDe WittePassefort, SophieSophiePassefortBesling, WimWimBeslingMaes, JosJosMaesEason, K.K.EasonYoung, EdwardEdwardYoungHeyns, MarcMarcHeyns2021-10-142021-10-142002https://imec-publications.be/handle/20.500.12860/6228In-line electrical metrology for high-k gate dielectrics deposited by atomic layer CVDMeeting abstract