Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs

Tahiat, A.A.TahiatCretu, B.B.CretuVeloso, AnabelaAnabelaVelosoSimoen, EddyEddySimoen2024-04-112023-11-082024-04-1120230038-1101WOS:001088841200001https://imec-publications.be/handle/20.500.12860/43117Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETsJournal article10.1016/j.sse.2023.108709WOS:001088841200001