Virtual Process-Based Spacer & Junction Optimization for an Inverter Circuit

Guissi, S.S.GuissiMeijer, P.P.MeijerSchram, TomTomSchramSchuddinck, PieterPieterSchuddinckDemuynck, StevenStevenDemuynck2021-11-222021-11-022021-11-222020naWOS:000610825100145https://imec-publications.be/handle/20.500.12860/38243Virtual Process-Based Spacer & Junction Optimization for an Inverter CircuitProceedings paper978-1-7281-2539-8WOS:000610825100145