A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAM

von Arnim, KlausKlausvon ArnimAugendre, EmmanuelEmmanuelAugendrePacha, C.C.PachaSchulz, ThomasThomasSchulzSan, Kemal TamerKemal TamerSanBauer, F.F.BauerNackaerts, AxelAxelNackaertsRooyackers, RitaRitaRooyackersVandeweyer, TomTomVandeweyerDegroote, BartBartDegrooteCollaert, NadineNadineCollaertDixit, AbhisekAbhisekDixitSinganamalla, RaghunathRaghunathSinganamallaXiong, W.W.XiongMarshall, A.A.MarshallCleavelin, C.R.C.R.CleavelinSchrüfer, K.K.SchrüferJurczak, GosiaGosiaJurczak2021-10-162021-10-162007https://imec-publications.be/handle/20.500.12860/13200A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAMProceedings paper