Near-optimal microprocessor and accelerators co-design with latency and throughput constraints

Kritikakou, AngelikiAngelikiKritikakouCatthoor, FranckyFranckyCatthoorAthanasiou, GiorgiosGiorgiosAthanasiouKelefouras, V.V.KelefourasGoutis, CostasCostasGoutis2021-10-212021-10-212013-041544-3566https://imec-publications.be/handle/20.500.12860/22617Near-optimal microprocessor and accelerators co-design with latency and throughput constraintsJournal article