Impact of the on-chip and off-chip ESD protection network on transient-induced latchup in CMOS IC

Scholz, MirkoMirkoScholzChen, Shih-HungShih-HungChenHellings, GeertGeertHellingsLinten, DimitriDimitriLinten2021-10-212021-10-212013-09https://imec-publications.be/handle/20.500.12860/23050Impact of the on-chip and off-chip ESD protection network on transient-induced latchup in CMOS ICProceedings paperIEEE Explore