Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays

Subhechha, SubhaliSubhaliSubhechhaCosemans, StefanStefanCosemansBelmonte, AttilioAttilioBelmonteRassoul, NouredineNouredineRassoulHoushmand Sharifi, ShaminShaminHoushmand SharifiDebacker, PeterPeterDebackerVerkest, DiederikDiederikVerkestDelhougne, RomainRomainDelhougneKar, Gouri SankarGouri SankarKar2023-08-082023-07-282023-08-022023-08-0820232330-7978WOS:001013930200039https://imec-publications.be/handle/20.500.12860/42222Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arraysProceedings paper10.1109/IMW56887.2023.10145946978-1-6654-7459-7WOS:001013930200039Electrical & electronic engineering