A 10.1 ENOB, 6.2fJ/con.-step, 500MS/s ringamp-based pipelined-SAR ADC with background calibration and dynamic reference regulation in 16nm CMOS

Lagos Benites, JorgeJorgeLagos BenitesMarkulic, NereoNereoMarkulicHershberg, BenjaminBenjaminHershbergDermit, DavideDavideDermitShrivas, MithleshMithleshShrivasMartens, EwoutEwoutMartensCraninckx, JanJanCraninckx2021-10-312021-10-312021https://imec-publications.be/handle/20.500.12860/36878A 10.1 ENOB, 6.2fJ/con.-step, 500MS/s ringamp-based pipelined-SAR ADC with background calibration and dynamic reference regulation in 16nm CMOSProceedings paperhttps://ieeexplore.ieee.org/document/9492354