A DfT architecture and tool flow for 3D-SICs with test data compression, embedded cores, and multiple towers

Papameletis, ChristosChristosPapameletisKeller, BrionBrionKellerChickermane, VivekVivekChickermaneHamdioui, SaidSaidHamdiouiMarinissen, Erik JanErik JanMarinissen2021-10-222021-10-2220152168-2355https://imec-publications.be/handle/20.500.12860/25734A DfT architecture and tool flow for 3D-SICs with test data compression, embedded cores, and multiple towersJournal articlehttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7089208