Defect analysis of strained silicon on thin strain-relaxed buffer layers for high mobility transistors

Eneman, GeertGeertEnemanSimoen, EddyEddySimoenDelhougne, RomainRomainDelhougneGaubas, EugenijusEugenijusGaubasSimons, VeerleVeerleSimonsRoussel, PhilippePhilippeRousselVerheyen, PeterPeterVerheyenLauwers, AnneAnneLauwersLoo, RogerRogerLooVandervorst, WilfriedWilfriedVandervorstDe Meyer, KristinKristinDe MeyerClaeys, CorCorClaeys2021-10-162021-10-162005https://imec-publications.be/handle/20.500.12860/10427Defect analysis of strained silicon on thin strain-relaxed buffer layers for high mobility transistorsJournal article