Imaging semiconductor patterns at N10 logic node with a high-throughput multi-beam SEM

Neumann, J.T.J.T.NeumannGaraboski, T.T.GaraboskiHalder, SandipSandipHalderLeray, PhilippePhilippeLerayGarreis, R.R.GarreisZeidler, D.D.Zeidler2021-10-232021-10-232016https://imec-publications.be/handle/20.500.12860/27073Imaging semiconductor patterns at N10 logic node with a high-throughput multi-beam SEMMeeting abstract