Low-power reconfigurable network architecture for on-chip photonic interconnects

Artundo, InigoInigoArtundoHeirman, WimWimHeirmanDebaes, ChristofChristofDebaesLoperena, MikelMikelLoperenaVan Campenhout, JanJanVan CampenhoutThienpont, HugoHugoThienpont2021-10-172021-10-172009https://imec-publications.be/handle/20.500.12860/14915Low-power reconfigurable network architecture for on-chip photonic interconnectsProceedings paper