Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices

Marinelli, TommasoTommasoMarinelliGomez Perez, JignacioJignacioGomez PerezTenllado, ChristianChristianTenlladoKomalan, ManuManuKomalanGupta, MohitMohitGuptaCatthoor, FranckyFranckyCatthoor2023-06-292023-06-202023-06-292023-06-2920221539-9087WOS:000754982400011https://imec-publications.be/handle/20.500.12860/41883Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient DevicesJournal article10.1145/3490391WOS:000754982400011RAMPERFORMANCEDESIGNSTT-MRAM, LLC