Verreck, DevinDevinVerreckRachidi, SanaSanaRachidiVan den Bosch, GeertGeertVan den BoschRosmeulen, MaartenMaartenRosmeulen2026-09-142026-09-142025979-8-3315-4884-1https://imec-publications.be/handle/20.500.12860/60343Airgaps have been proposed to mitigate interwordline interference in vertically scaled 3-D NAND flash memories. Here, we show with calibrated simulations that specific airgap configurations also improve the memory operation by increasing the electric field around carrier injection points. We investigate both cylindrical gate-all-around and vertical trench cell architectures. For gate-all-around cells, we find a significant reduction of the programming voltage and improvement in erase onset when the airgaps extend into the tunnel oxide. For trench cells, we propose an inter-channel airgap configuration that strongly improves the programming operation, making it competitive with the gate-all-around architecture.engProceedings paper10.1109/sispad66650.2025.11186316WOS:001846246700039