NPN SiGe Hetero Junction Transistor Latch-Up Memory Selector

Hiblot, GaspardGaspardHiblotRavsher, TarasTarasRavsherLoo, RogerRogerLooYengula Venkata Ramana, BhuvaneshwariBhuvaneshwariYengula Venkata RamanaCanvel, YannYannCanvelFranchina Vergel, NathaliNathaliFranchina VergelFantini, AndreaAndreaFantiniHoushmand Sharifi, ShaminShaminHoushmand SharifiBazzazian, NinaNinaBazzazianAyyad, MustafaMustafaAyyadMerkulov, AlexAlexMerkulovKar, Gouri SankarGouri SankarKarCouet, SebastienSebastienCouet2024-02-272023-04-272023-05-032024-02-272023-02-030741-3106WOS:000967234300001https://imec-publications.be/handle/20.500.12860/41487NPN SiGe Hetero Junction Transistor Latch-Up Memory SelectorJournal article10.1109/LED.2023.3242302WOS:000967234300001Electrical & electronic engineering