The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices

Vais, AbhitoshAbhitoshVaisMartens, KoenKoenMartensFranco, JacopoJacopoFrancoLin, DennisDennisLinAlian, AliRezaAliRezaAlianRoussel, PhilippePhilippeRousselSioncke, SonjaSonjaSionckeCollaert, NadineNadineCollaertThean, AaronAaronTheanHeyns, MarcMarcHeynsGroeseneken, GuidoGuidoGroesenekenDe Meyer, KristinKristinDe Meyer2021-10-222021-10-222015https://imec-publications.be/handle/20.500.12860/26028The relationship between border traps characterized by AC admittance and BTI in III-V MOS devicesProceedings paperhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7112742